A family of 32-bit CPU chips from Intel. The term may refer to the chip or to a PC that uses it. Pentium chips and Pentium PCs are the most widely used in the world for general-purpose computing. The current series is made up of Pentium 4 models and Celerons.
The first Pentium chip was introduced in 1993 as the successor to the 486; thus the Pentium began as the fifth generation of the Intel x86 architecture (see x86). Numerous variations of the Pentium have been introduced with increased performance. Each new line executes more instructions in the same clock cycle as the previous, and clock speeds increase constantly. The Pentium uses a 64-bit internal bus compared to 32-bits in its 486 predecessor. Note that Intel's next-generation Itanium chip departs from the Pentium architecture (see Itanium). Following is a brief summary of all Pentium families.
Pentium 4 Dual Cores - Introduced in 2005
The Pentium D and Pentium Processor Extreme Edition 840 are the first dual core Pentium chips from Intel. Although both chips include Intel's 64-bit EM64T technology, the Pentium D does not include Hyper-Threading, but the Extreme Edition does. See Pentium Processor Extreme Edition.
Pentium 4 - Introduced in 2000 (1.4-3.4GHz)
Latest Pentium architecture started out with a 400MHz system bus and 256KB L2 cache (later increased to 800MHz and 2MB). The first models contained 42 million transistors, used the 0.18 micron process and came in 423-pin and 478-pin PGA packages. Intel's first Pentium 4 chipset was the 850 and supported only Rambus memory (RDRAM), but subsequent chipsets switched to DDR SDRAM. See NetBurst.
Celeron - Introduced in 1998 (266MHz-2.8GHz)
Less expensive Pentium chips due to smaller L2 caches. First Celerons had no L2 cache, but 128KB on-die cache was added in 1999. Celerons started out with 66 and 100MHz system buses that migrated to 400MHz.
Pentium III - 1999-2001 (500MHz-1.13GHz)
The Pentium III added 70 additional instructions to the Pentium II. The Pentium III used a 100 or 133MHz system bus and either a 512KB L2 cache or a 256KB L2 Advanced Transfer Cache. Depending on the model, it contained from 9.5 to 28 million transistors, used the 0.25 or 0.18 micron process and came in SECC and SECC2 packages. Mobile units came in BGA and micro-PGA (µPGA) packages.
Pentium III Xeon - 1999-2001 (500MHz-933MHz)
Typically used in 2-way to 8-way servers, Xeon specs were like Pentium III with L2 cache up to 2MB. The Xeon used the SECC2 and SC330 chip packages.
Pentium II - 1997-1999 (233MHz-450MHz)
Added MMX multimedia instructions to Pentium Pro and introduced the Single Edge Connector Cartridge (SECC) for Slot 1. The Pentium II used a 66 or 100MHz system bus. Desktop models had 7.5 million transistors, 512KB L2 cache and were housed in SECC packages. Mobile models had 27.4 million transistors, 256KB L2 cache and were housed in either BGA or Mobile Mini-Cartridge (MMC) packages.
Pentium II Xeon - 1998-1999 (400MHz-450MHz)
Typically used in high-end and 2-way and 4-way servers, Xeon specs were like Pentium II with L2 cache from 512KB to 2MB and 100MHz system bus.
Pentium Pro - 1995-1997 (150MHz-200MHz)
Typically used in high-end desktops and servers, the Pentium Pro increased memory from 4GB to 64GB. The Pentium Pro had L2 cache from 512KB to 1MB, used a 60 or 66MHz system bus, contained from 5.5 to 62 million transistors. It was made with 0.35 process and housed in a dual cavity PGA package. When introduced, it was touted as being superior to the Pentium for 32-bit applications.
Pentium MMX - 1997-1999 (233MHz-300MHz)
Added MMX multimedia instructions to Pentium CPU and increased transistors to 4.5 million. Desktop units used PGA package and 0.35 process while mobile units used TCP and 0.25 process.
Pentium - 1993-1996 (60MHz-200MHz)
First Pentium CPU models. The Pentium had an L2 cache from 256KB to 1MB, used a 50, 60 or 66MHz system bus and contained from 3.1 to 3.3 million transistors built on 0.6 to 0.35 process. Chips were housed in PGA packages.
Model Memory Gen Instructions
Pentium 4 4GB NB MMX, SSE, SSE2
P4 Xeon 64GB NB MMX, SSE, SSE2
Celeron 4GB P6 MMX
PIII Xeon 64GB P6 MMX, SSE
Pentium III 4GB P6 MMX, SSE
PII Xeon 64GB P6 MMX
Pentium II 4GB P6 MMX
Pentium Pro 64GB P6
Pentium MMX 4GB P5 MMX
Pentium 4GB P5
Code name for generation of architecture
NB = NetBurst architecture
MMX added 57 instructions (see MMX).
SSE added 70; SSE2 added 144 (see SSE).